This specification describes a process for improving performance in a multithreaded processor.
Processors are usually designed to handle operands of a certain size. For example, operands may be 32 bits or 64 bits in size. In general, processors are designed to perform integer operations such that even if operands are smaller than the maximum size handled by the processor, operands are padded with additional 0's or sign-extended and some processor capacity is left unutilized. For example, in a 64 bit processor, integer operations are designed to expect integer operands that are 64 bits in size. Even with legacy software that is designed to use operands that are 32 bits in size, integer operations will operate on 32 bits at a time and simply ignore the other 32 bits.
While this approach allows a processor to treat all operands the same, regardless of size, parts of the integer processing pipeline and the load/store pipeline are left unused when processing operands that are narrower than the full bit width of the processing pipeline.